The invention described herein relates generally to semiconductor devices and processing. In particular, the present invention relates to methods, materials, and structures used in semiconductor fabrication processes that result in dielectric layers having porous regions of lowered dielectric constant K.
As greater and greater circuit densities are sought in semiconductor fabrication, metal interconnections are becoming more numerous and closer together. The increased circuit and interconnect densities can result in undesirable cross-talk problems and greater RC interconnect delays. These RC delays are becoming a more important factor in limiting chip performance. This puts additional demands on the dielectric layers used to electrically isolate the metal interconnects and circuit element from one another. One way to address the RC delay problem is to lower C (capacitance) in the circuit. One approach to achieving lowered capacitance is to incorporate dielectric materials having a lower dielectric constant (xcexa). Existing methods for reducing capacitance include the implementation of specialized low-xcexa materials to create electrical isolation regions on semiconductor wafers. But, as circuit and interconnect density increases there is a need for materials and structures that have even lower dielectric constants.
To achieve these goals, dielectric structures having reduced dielectric constants and new methodologies for their fabrication are needed.
In accordance with the principles of the present invention, methods and structures for an improved dielectric layer are disclosed. One embodiment of the present invention is directed to a semiconductor structure including a semiconductor substrate having at least one overlying layer formed thereon. The at least one overlying layer including at least one layer of dielectric material. The at least one layer of dielectric material including a protected region having a first dielectric constant and another porous region having a second dielectric constant wherein the value for the second dielectric constant is less than the first dielectric constant. The porous region having been formed by the implantation of a porosity inducing material into the porous region and subsequent annealing.
Another embodiment of the invention includes a method for forming such structures. The method includes the steps of providing a semiconductor substrate having at least one overlying layer that includes a layer of dielectric material having a first dielectric constant formed thereon. Implanting a portion of the dielectric layer with a porosity inducing agent to form porosity regions. Annealing the semiconductor substrate to form micro-pores in the implanted porosity regions, the annealed porosity regions having a second dielectric constant having a lower numerical value than a numerical value for the first dielectric constant.
These and other attributes of the present invention are disclosed herein.